Saturday, August 14, 2010

Power consumption

Increases with clock rate.[8]
Module and chip characteristics are inherently linked.

Total module capacity is a product of one chip's capacity by the number of chips. ECC modules multiply it by 8/9 because they use one bit per byte for error correction. A module of any particular size can therefore be assembled either from 32 small chips (36 for ECC memory), or 16(18) or 8(9) bigger ones.

DDR memory bus width per channel is 64 bits (72 for ECC memory). Total module bit width is a product of bits per chip by number of chips. It also equals number of ranks (rows) multiplied by DDR memory bus width. Consequently a module with greater amount of chips or using ×8 chips instead of ×4 will have more ranks.

Example: Variations of 1 GB PC2100 Registered DDR SDRAM module with ECC Module size (GB) Number of chips Chip size (Mbit) Chip organization Number of ranks
1 36 256 64M×4 2
1 18 512 64M×8 2
1 18 512 128M×4 1

This example compares different real-world server memory modules with a common size of 1 GB. One should definitely be careful buying 1 GB memory modules, because all these variations can be sold under one price position without stating whether they are ×4 or ×8, single or dual ranked.

There is a common belief that number of module ranks equals number of sides. As above data shows, this is not true. One can find 2-side/1-rank or 2-side/4-rank modules. One can even think of a 1-side/2-rank memory module having 16(18) chips on single side ×8 each, but it's unlikely such a module was ever produced.

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