Friday, August 6, 2010

[edit] E-DDC

Enhanced Display Data Channel (E-DDC) is the most recent revision of the DDC standard. Version 1 was introduced in September 1999 and featured the addition of a segment pointer which allowed up to 32 Kbytes of display information storage for use by the Enhanced EDID (E-EDID) standard.
Earlier DDC implementations used simple 8-bit data offset when communicating with the memory at I²C address A1h (7-bit address 50h, read-only, so A1h) in the monitor, limiting the storage size to 28 bytes = 256 bytes, but allowing the use of cheap 2-Kbit EEPROMs. In E-DDC, a special I²C addressing scheme involves a single 8-bit segment index which is passed to the display via the new I²C address 60h (7-bit address 30h, write-only, so 60h). Data from the selected segment is then immediately read via the regular DDC2 address at A1h using a repeated I²C 'START' signal. However, VESA specification defines the segment index value range as 00h to 7Fh, so this only allows addressing 128 segments * 256 bytes = 32KB. The segment index register at 60h is volatile, defaulting to zero and automatically resets to zero after each NACK or STOP, therefore it should be set every time access to data above the first 256-byte segment is performed. The auto-reset mechanism is to provide for backward compatibility to, for example, DDC2B hosts, otherwise they may be stuck at a segment other than 00h in some rare cases.
Other important changes were removal of the DDC1 and DDC2Ab protocols, deprecation of separate VESA P&D and FPDI device addresses, and clarifications to the DDC power requirements.
E-DDC Version 1.1, approved March 2004, featured support for
HDMI and consumer electronics.
E-DDC Version 1.2, approved December 2007, introduced support for
DisplayPort (which has no dedicted DDC2B links and uses its bidirectional auxiliary channel for EDID and MCCS communication) and DisplayID standards.

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